Mitul Nagar
Low power processor architecture for IoT Applications.
Low power processor architecture for IoT Applications.
Hardware Architecture for Embedded CNN
Hardware Architecture for MIMO
Software Defined Networking
Performance Optimization of Multi Core RISC-V Architecture for Face Recognition Algorithm
FPGA based Accelerator design for Variable dimension Convolution for CNN
Hardware Based Packet Classification Algorithms
Performance Assessment of RISC-V Based Multiprocessor System
Evaluate Convolution Layer and Optimize by Quantization Technique on Hardware
Architecture evaluation of Various Processors for Vehicle License Plate Detection
Modular CNN based Object Tracking Implementation in FPGA Systems
Improving 3D Face Quality using Generative Adversarial Network
Design of MAC unit for RISC-V based IoT node
HDL Implementation of License Plate Extraction algorithm
HDL implementation of various blocks in face recognition algorithm
HDL Implementation of LDPC Decoder for CCSDS standard
Image Feature Extraction using SIFT on FPGA
Clock Distribution Planning for High Frequency
FPGA validation of different short codelength QC-LDPC decoder
Acceleration of DL based algorithm (GOTURN) on Zynq SoC using Vivado HLS
Design Automation using Eldo tool for efficient & faster design of clock cells
Validation and Verification of performance efficient graphics Architecture.
FPGA implementation of Software defined networking with OpenFlow
Design and implementation of Variable rate Quasi cycle LDPC code
FPGA implementation of Face tracking
Implementation of Multi-threaded Image processing using ReconOS on Reconfigurable computing systems
Design and implementation of Quasi Cycle LDPC Code
Implementation of Effective optimization strategies in Low power SoC physical design
Register file design: challenges and optimization at sub0-micron nodes
DDR4 interface design verification for Xeon servers
Implementation of Microphone array for speech recognition enhancement
FPGA implementation of Memory based architecture for scale invariant feature transform
Implementation of Particle filter based object tracking on NoC Archiecture
Streaming Architecture for Image Processing
HDL implementation of LDPC decoder
GPU implementation of Earth Mover’s Distance
FPGA implementation of Earth Mover’s distance
SystemC Simulation model of the Scale Invariant Feature transform
FPGA implementationof LDPC codes
VHDL implementation of Hough transform
Multi-picoblaze implementation for Image Processing
VHDL implementation of SIFT algorithm
SIFT implementation on Many core Rigel Architecture
Design of a unified timing signal generator (UTSG) for pulsed radar
SIFT algorithm using GPU
Design and verification of an Automated CRC Engine
HDL implementation of Object Tracking using Kalman Filter
HDL Impelmentation of Object Tracking using Mean Shift Algorithm
Reconfigurable FFT Processor
VHDL Implementation of Sobel Edge Detector
Instruction Set Customization in Embedded Processor
A VHDL IMPLEMENTATION OF UART DESIGN WITH BIST CAPABILITY
Object tracking in online Video
Finger Print recognition using Matlab