1. G. Siddharth, V. Garg, B. S. Sengar, R. Bhardwaj, P. Kumar, and S. Mukherjee, "Analytical Study of Performance Parameters of InGaN/GaN Multiple Quantum Well Solar Cell," IEEE Transactions on Electron Devices, vol. 66, no. 8, pp. 3399-3404, 2019, doi: 10.1109/TED.2019.2920934.
2. A. Kumar et al., "Resistive switching in reactive electrode-based memristor: engineering bulk defects and interface inhomogeneity through bias characteristics," Semiconductor Science and Technology, 2019.
3. V. Garg, B. S. Sengar, A. Kumar, G. Siddharth, S. Kumar, and S. Mukherjee, "Investigation of valence plasmon excitations in GMZO thin film and their suitability for plasmon-enhanced buffer-less solar cells," Solar Energy, vol. 178, pp. 114-124, 2019/01/15/ 2019, doi: https://doi.org/10.1016/j.solener.2018.12.017.
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5. V. Garg and S. Mukherjee, "Plasmons for efficient light harvesting in ultrathin solar cells," Discipline of Electrical Engineering, IIT Indore, 2019.
6. S. N. Supardan, P. Das, J. D. Major, A. Hannah, Z. H. Zaidi, R. Mahapatra, K. B. Lee, R. Valizadeh, P. A. Houston, S. Hall, and V. R. Dhanak, "Band alignments of sputtered dielectrics on GaN," Journal of Physics D: Applied Physics, vol. 53, no. 7, p. 075303, 2019.
7. S. Maji, S. Samanta, P. Das, S. Maikap, V. R. Dhanak, I. Z. Mitrovic, and R. Mahapatra, "Set compliance current induced resistive memory characteristics of W/Hf/HfOx/TiN devices," Journal of Vacuum Science & Technology B, vol. 37, no. 2, 2019.
8. N. Chatterji and P. R. Nair, "Electron versus hole extraction: self-doping induced performance bottleneck in perovskite solar cells," IEEE Electron Device Letters, vol. 40, no. 11, pp. 1784-1787, 2019.
9. N. Chatterji, A. Antony, and P. R. Nair, "Temperature coefficient of silicon-based carrier selective solar cells," IEEE Journal of Photovoltaics, vol. 9, no. 3, pp. 583-590, 2019.
10. S. Yadav, A. Pamnani, D. Sharma, A. Gedam, A. Kumar, and N. Sharma, "A novel design approach of charge plasma tunnel FET for radio frequency applications," Journal of Semiconductors, vol. 40, no. 5, p. 052901, 2019.
- 11. S. Yadav, M. Vemulapaty, D. Sharma, A. Gedam, and N. Sharma, "Design structure of tunnel FET by combining thermionic emission with tunneling phenomenon," Micro & Nano Letters, vol. 14, no. 4, pp. 450-454, 2019.
- 12. B. V. Chandan, M. Gautami, K. Nigam, D. Sharma, V. A. Tikkiwal, S. Yadav, and S. Kumar, "Impact of a metal-strip on a polarity-based electrically doped TFET for improvement of DC and analog/RF performance," Journal of Computational Electronics, vol. 18, pp. 76-82, 2019.
- 13. J. Patel, D. Sharma, S. Yadav, A. Lemtur, and P. Suman, "Performance improvement of nano wire TFET by hetero-dielectric and hetero-material: At device and circuit level," Microelectronics Journal, vol. 85, pp. 72-82, 2019.
- 14. S. Yadav, J. Patel, and D. Sharma, "A novel proposal for enhancing tunnel field effect transistor performance and its reliability issues," Journal of Nanoelectronics and Optoelectronics, vol. 14, no. 2, pp. 238-246, 2019.
- 15. M. Aslam, D. Sharma, S. Yadav, D. Soni, N. Sharma, and A. Gedam, "A comparative investigation of low work‐function metal implantation in the oxide region for improving electrostatic characteristics of charge plasma TFET," Micro & Nano Letters, vol. 14, no. 2, pp. 123-128, 2019.
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- 17. R. Pal, A. Prakash, R. Tripathi, and K. Naik, "Scheduling algorithm based on preemptive priority and hybrid data structure for cognitive radio technology with vehicular ad hoc network," IET Communications, vol. 13, no. 20, pp. 3443-3451, 2019.
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- 19. F. Begum, S. Mishra, M. N. Islam, and A. Dandapat, "A 10-bit 2.33 fJ/conv. SAR-ADC with high speed capacitive DAC switching using a novel effective asynchronous control circuitry," Analog Integrated Circuits and Signal Processing, vol. 100, pp. 311-325, 2019.
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- 1. B. S. Sengar, V. Garg, A. Kumar, S. Kumar, and S. Mukherjee, "Surface layer investigation of dual ion beam sputtered Cu₂ZnSn (S, Se)₄ thin film for open circuit voltage improvement," Journal of Physics D: Applied Physics, 2018.
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- 12.M. Aslam, D. Sharma, D. Soni, S. Yadav, B. R. Raad, D. S. Yadav, and N. Sharma, "Effective design technique for improvement of electrostatics behaviour of dopingless TFET: proposal, investigation and optimisation," Micro & Nano Letters, vol. 13, no. 10, pp. 1480-1485, 2018.
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- 14.S. Gupta, D. Sharma, D. Soni, S. Yadav, M. Aslam, D. S. Yadav, K. Nigam, and N. Sharma, "Examination of the impingement of interface trap charges on heterogeneous gate dielectric dual material control gate tunnel field effect transistor for the refinement of device reliability," Micro & Nano Letters, vol. 13, no. 8, pp. 1192-1196, 2018.
- 15.S. Yadav, R. Madhukar, D. Sharma, M. Aslam, D. Soni, and N. Sharma, "A new structure of electrically doped TFET for improving electronic characteristics," Applied Physics A, vol. 124, pp. 1-9, 2018.
- 16.D. Soni, D. Sharma, M. Aslam, and S. Yadav, "Improvement in electrostatic characteristics of doped TFETs by hole layer formation," Journal of Computational Electronics, vol. 17, no. 2, pp. 736-744, 2018.
- 17.B. V. Chandan, S. Dasari, S. Yadav, and D. Sharma, "Approach to suppress ambipolarity and improve RF and linearity performances on ED‐tunnel FET," Micro & Nano Letters, vol. 13, no. 5, pp. 684-689, 2018.
- 18.S. Yadav, D. Sharma, B. V. Chandan, M. Aslam, D. Soni, and N. Sharma, "A novel hetero-material gate-underlap electrically doped TFET for improving DC/RF and ambipolar behaviour," Superlattices and Microstructures, vol. 117, pp. 9-17, 2018.
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- 1. R. Singh et al., "Investigation of barrier inhomogeneities and interface state density in Au/MgZnO: Ga Schottky contact," Journal of Physics D: Applied Physics, vol. 49, no. 44, p. 445303, 2016, doi: 10.1088/0022-3727/49/44/445303.
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